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Logic Overview of basic gates and universal logic gates and AND-OR-Invert
gates, Positive and negative logic, Introduction to HDL. Combinational Logic
Circuits Boolean laws and theorems, Sum-of-products method, Truth table to
Karnaugh Map, Pairs, Quads, and Octets, Karnaugh simplifications, Don't care
conditions, Product-of-sums method, Product-of-sums simplification,
Simplification by Quine-McClusky method, Hazards and Hazard covers, HDL
implementation models. Data Processing Circuits Multiplexers, Demultiplexers,
1-to-16 decoders BCD-to-Decimal decoders, Seven-segment decoders, Encoders,
EX-OR gates, Parity generators and checkers, Magnitude comparator, Read-only
memory, Programmable array logic, Programmable logic array, Troubleshooting
with a logic probe, HDL implementation of data processing circuits. Arithmetic
Circuits Binary addition, Binary subtraction, Unsigned binary numbers,
Sign-magnitude numbers, 2's complement representation, 2's complement
arithmetic, arithmetic building blocks, The adder-subtractor, Fast adder,
Arithmetic logic unit, Binary multiplication and division, Arithmetic circuits
using HDL. Clocks and Timing Circuits Clock waveforms, TTL clock, Schmitt
trigger, Monostables with input logic, Pulse-forming circuits. Flip-flopsRS
flip-flops, gated flip-flops, Edged-triggered RS, D, JK flip-flops, Flip-flop
timing, JK master-slave flip-flops, Switch contact bounce circuits, Various
representations of flip-flops, Analysis of sequential circuits, Conversion of
flip-flops - a synthesis example, HDL implementation of flip-flop. Registers Types
of registers, Serial in-serial out, Serial in-parallel out, Parallel in-serial
out, Parallel in-parallel out, Applications of shift registers, register
implementation in HDL. Counters Asynchronous counters, Decoding gates,
Synchronous counters, Changing the counter modulus, Decade counters,
Presettable counters, Counter design as a synthesis problem, A digital clock,
Counter design using HDL. Design of Sequential Circuit Model selection, State
transition diagram, State synthesis table, Design equations and circuit
diagram, Implementation using read only memory, Algorithmic state machine,
State reduction technique, Analysis of asynchronous sequential circuit,
Problems with asynchronous sequential circuits, Design of asynchronous
sequential circuit. D/A Conversion and A/D Conversion Variable, Resistor
networks, Binary ladders, D/A converters, D/A accuracy and resolution, A/D
converter-simultaneous conversion, A/D converter-counter method, Continuous A/D
conversion, A/D techniques, Dual-slope A/D conversion, A/D accuracy and
resolution. Digital Integrated Circuits Switching circuits, 7400 TTL, TTL
parameters, TTL overview, Open-collector gates, Three-state TTL devices,
External drive for TTL loads, TTL driving external loads, 74C00 CMOS, CMOS
characteristics, TTL-to-CMOS interface, CMOS-to-TTL interface, TTL and CMOS
family and their characteristics.
Principles of Combinational logic-1
Principles of Combinational logic-2
Analysis and Design of Combinational Logic-1
Unit 4: Analysis
and Design of Combinational Logic-2
Unit 6: Sequential
papers of VTU
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