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Samir Palnitkar’s Verilog HDL: A Guide to Digital Design and Synthesis, 2nd ed. 2nd Edition is a comprehensive book for Electronics & Communication Engineering. The book comprises of latest versions of Verilog, extensive examples, illustrations and learning objectives and summaries of every chapter for students. In addition, the book is divided into multiple chapters for better understanding of electronics and communication engineering concepts. This book is can be used by 3rd semester engineering students.
About Samir Palnitkar
Samir Palnitkar is an Indian author and technology entrepreneur. He has authored books like Design Verification with E and Verilog Hdl. Palnitkar got his engineering degree from IIT Kanpur, Masters degree from the University of Washington and an MBA from San Jose State University.
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